全文截稿: 2021-04-02
开会时间: 2021-10-10
会议难度: ★★★
CCF分类: C类
会议地点: Virtual Conference
网址：
https://esweek.org/cases/
CASES is a premier forum where researchers, developers and practitioners
exchange information on the latest advances in compilers and architectures
for high-performance, low-power, and domain-specific embedded systems.
The conference has a long tradition of showcasing leading edge research
in embedded architectures for processor, memory, interconnect, and
storage, as well as related compiler techniques targeting performance,
power, security, reliability, predictability issues for both traditional
and emerging application domains. We also invite innovative papers
addressing design, synthesis & optimization challenges in heterogeneous,
accelerator-rich architectures.
Timeline
---------------------------------
Journal-Track Submissions
- Abstracts: April 2, 2021
- Full Papers: April 9, 2021 (firm)
Work-in-Progress Submissions
- June 4, 2021 (firm)
Notification of Acceptance
- July 5, 2021 (both tracks)
Topics of Interests / Tracks
---------------------------------
Compilers for Embedded Systems: Compilation for power and performance;
Compiler support for CPU, GPU, reconfigurable computing, heterogeneous
and domain-specific multi-core SoC; Compilation for memory, storage, and
on-chip communications.
Processor Architectures: Embedded and mobile processor micro-architecture,
Multi- and many-core processors, GPU architectures, Reconfigurable
computing including FPGAs and CGRAs, Application-Specific processor
design, 3D-stacked architectures; Power- and energy-efficient
architectures.
Memory and Storage: Memory system architecture; Non-volatile and other
emerging memory technologies; Scratchpad memory, caches and compiler-
controlled memories; storage organization including flash storage.
On-chip communication and I/O: Networks-on-chip architectures and design
methodologies; on-chip communication synthesis, analysis, and
optimization; I/O management in embedded systems.
Accelerators: Synthesis, optimization, and design-space exploration of
high-performance, low-power accelerators; Novel design paradigms and
compilers for accelerators including approximate computing, machine
learning and big-data analytics.
Security, Reliability, and Predictability: Secure architectures, hardware
security, and compilation for software security; Architecture and
compiler techniques for reliability and aging; Modeling, design,
analysis, and optimization for timing and predictability; Validation,
verification, testing & debugging of embedded software.
AI Hardware and ML Applications: Architectures, accelerators, and compilers
