Improvements in I/O data rates and power consumption are necessary to support the future bandwidth requirements for next-generation datacenters and exa-scale supercomputing. While high-performance I/O circuitry can leverage the technology improvements that enable increased core performance, unfortunately the bandwidth of the electrical channels used for inter-chip communication has not scaled in the same manner. As CMOS technology scaling allows for the efficient implementation of powerful on-chip digital signal processing (DSP) algorithms for equalization and symbol detection, this motivates the use of analog to digital converter (ADC)-based analog front ends in I/O receiver design. Unfortunately, ADC-based receivers are generally more complex and consume higher power. This talk will provide an overview of recent advances in the design and modeling of ADC-based serial links, including discussion on a statistical modeling framework, low-power >10GS/s ADC designs, and novel receiver architectures which leverage partial analog equalization embedded in the ADC.
主讲人介绍
Samuel Palermo 教授，visionICs联合创始人, CTO。多年就职于英特尔实验室和德州仪器，从事高速收发器的开发设计。2009年加入德州农工大学电子工程系任教授和博士生导师。Palermo教授是超高速光电互联先驱，理论奠基人之一。获美国国家科学终生成就奖，担任多个国际学术会议的委员会主席。Palermo教授在学术界和工业界都拥有非常高的声誉，是美国电子工程协会的著名演讲嘉宾，IEEE SSCS Distinguished Speaker。
Samuel Palermo (S’98-M’07) received the B.S. and M.S. degrees in electrical engineering from Texas A&M University, College Station, TX in 1997 and 1999, respectively, and the Ph.D. degree in electrical engineering from Stanford University, Stanford, CA in 2007.
From 1999 to 2000, he was with Texas Instruments, Dallas, TX, where he worked on the design of mixed-signal integrated circuits for high-speed serial data communication. From 2006 to 2008, he was with Intel Corporation, Hillsboro, OR, where he worked on high-speed optical and electrical I/O architectures. In 2009, he joined the Electrical and Computer Engineering Department of Texas A&M University where he is currently an associate professor. His research interests include high-speed electrical and optical interconnect architectures, high performance clocking circuits, and integrated sensor systems.
Dr. Palermo is a recipient of a 2013 NSF-CAREER award. He is a member of Eta Kappa Nu and IEEE. He has served as an associate editor for IEEE Transactions on Circuits and System – II from 2011 to 2015 and has served on the IEEE CASS Board of Governors from 2011 to 2012. He is currently a distinguished lecturer for the IEEE Solid-State Circuits Society. He was a coauthor of the Jack Raper Award for Outstanding Technology-Directions Paper at the 2009 International Solid-State Circuits Conference, the Best Student Paper at the 2014 Midwest Symposium on Circuits and Systems, and the Best Student Paper at the 2016 Dallas Circuits and Systems Conference. He received the Texas A&M University Department of Electrical and Computer Engineering Outstanding Professor Award in 2014 and the Engineering Faculty Fellow Award in 2015.
