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Positon：
SoC Design Engineer ( Video Processing ) - 上海
SoC Design Engineer ( SoC/DDR Controller ) - 上海
SoC Design Engineer ( Video Codec）- 上海
Embedded Software Engineer ( Video ) - 上海
Senior FPGA Engineer（FPGA Implement / PCB Layout） - 上海+杭州
SoC Verification Engineer - 杭州
感谢您对澜起科技的关注与认可，澜起科技集团上海+杭州地区诚聘SoC设计英才！如果觉得职位匹配可直接发送简历至邮箱([email protected])，如您身边有合适的朋友，也欢迎推荐，收到简历后，我们会尽快处理，谢谢！
JOB TITLE: SoC Design Engineer ( Video Processing）- 上海
JOB DESCRIPTION:
1. Module-level architecture definition and design;
2. Module-level RTL implementation;
3. Simulation/Verification at both module level and system level;
4. Module-level synthesis and timing analysis;
5. Writing design spec and report;
6. FPGA/silicon debug on related modules.
JOB QUALIFICATIONS:
1. Bachelor degree or Master degree in ASIC Design Relevant;
2. >3 years of SoC design experience;
3. Knowledge of video processing
4. Solid knowledge on digital IC design; Strong skills of Verilog RTL coding and simulation; Hands-on experiences on EDA tools, such as Cadence and Synopsys tools; Familiar with C language;
5. Relevant experiences on STB product;
6. Good communication skills and Good oral/written English.
JOB TITLE: SoC Design Engineer ( SoC / DDR Controller ) - 上海
JOB DESCRIPTION:
1. Module-level architecture definition and design;
2. Module-level RTL implementation;
3. Simulation/Verification at both module level and system level;
4. Module-level synthesis and timing analysis;
5. Writing design spec and report;
6. FPGA/silicon debug on related modules.
JOB QUALIFICATIONS:
1. Bachelor degree or Master degree in ASIC Design Relevant;
2. >2 years of SoC design experience;
3. Experience on DDR Controller;
4.Solid knowledge on digital IC design; Strong skills of Verilog RTL coding and simulation; Hands-on experiences on EDA tools, such as Cadence and Synopsys tools; Familiar with C language;
5. Relevant experiences on STB product;
6. Good communication skills and Good oral/written English.
JOB TITLE: SoC Design Engineer ( Video Codec）- 上海
JOB DESCRIPTION:
1. Module-level architecture definition and design；
2. Module-level RTL implementation；
3. Simulation/Verification at both module level andsystem level；
4. Module-level synthesis and timing analysis；
5. Writing design spec；
6. FPGA/silicon debug on related modules.
QUALIFICATION:
1. MSEE with Minimum 2-year experience on digitalIC design；
2. Solid knowledge on digital IC design；
3. Strong skills of Verilog RTL coding andsimulation；
4. Hands-on experiences on EDA tools, such asCadence and Synopsys tools；
5. Familiar with C language；
6. Relevant experiences on video codec are plus；
7. Hardworking and self-motivated；
8. A team player.
JOB TITLE: Embedded Software Engineer ( Video ) - 上海
JOB DESCRIPTION:
- Design and develop multi-format video decoder firmware on embedded system;
- Work with ASIC design team for the video system performance and function validation including firmware/hardware co-simulation, FPGA verification, etc;
- Co-work closely with Software team to improve the framework of firmware, define and implement the API function and customize generic firmware to specific products;
- Analyze and fix bugs, and support customer-specific issues.
QUALIFICATION:
- Master degree with more than 3 years' experience or Bachelor degree with more than 5 years’ experience in related field;
- Strong C/C++ programming experience is required;
- Strong knowledge of Video codec, such as MPEG2, H.264, HEVC/H.265, etc;
- Knowledge of Multimedia APIs such as OpenMAX;
- Experience to develop multimedia driver (in a certain platform such as Linux, Android, etc) on popular multimedia platform, such as ffmpeg, Gstreamer, etc;
- Good communication skills and strong team-player mindset;
- Experience on video post processing is a plus.
JOB TITLE: Senior FPGA Engineer（FPGA Implement / PCB Layout）- 上海+杭州
JOB DESCRIPTION:
- Build up and maintain FPGA test platforms，including schematics design and layout support;
- Collect function points from design specification, generate/run/debug test cases on FPGA;
- Porting ASIC to FPGA and generate bit file, including simulation, synthesis and PaR;
- Help to develop driver for modules and silicon chip bring up, validation and debug.
QUALIFICATION:
- BSEE，More than 5 years’ working experience on PCB design;
- Experience in digital and analog circuit design and debug;
- Familiar with lab equipments, such as oscilloscope, logic analyzer, spectrum analyzer, etc.;
- Knowledge of Digital TV, Digital Video Broadcast system, Set Top Box, MPEG decoder, TV display and audio system;
- Proficient in C programming under Windows or embedded RTOS;
- Knowledge of PLD/FPGA design flow using Verilog/VHDL and EDA tools such as Xilinx ISE, Altera Quartus.
JOB TITLE: SoC Verification Engineer-杭州
JOB DESCRPTION:
- Be responsible for the development of the verification platform including the scripts developing, SOC testbench building, evaluating the cutting edge of verification methodology and integrating them into the platform.
- Be responsible for the SoC database management, SoC simulation bring up, regression and coverage collection and analysis
- Implement the SoC functional verification tasks from verification plan definition to tests development on both sim and emu platform.
- Implement the gate level simulation, Low power simulation with UPF
YEARS OF EXPERIENCE REQUIREMENT
BS or MS Degree with 2 years or above experiences in ASIC/complex SoC verification.
QUALIFICATION:
KEY KNOWLEDGE, SKILLS AND ABBILITIES REQUIRED
- Has strong skill of the scripts languages(Python/Makefile/Perl), and has hands-on experience of SOC simulation ENV development
- Familiar with HDL languages (Verilog/VHDL/SV), simulation tool-chain (IES/VCS/Questa) and testbench design with SV.
- Familiar with assemble instruction sets and know how to integrate low level driver software into SOC architecture. Solid debugging ability on ARM processors is preferred
- Experience of SOC designs with embedded processor and their integration with other system components including memory subsystems and peripherals
- Good communication skills, will work with IP/SOC/CAD team closely
- Hands-on experience with UVM is a plus
- Experience related to Low Power Verification with UPF/CPF flow is a plus
- Experience with gate level simulation is preferred
集微网推出集成电路微信公共号：“天天IC”，重大新闻即时发布，天天IC、天天集微网，积微成著！点击文章末端“阅读原文”或长按 laoyaoic 复制微信公共号搜索添加关注。
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